42398f13b0
* rwkv6: rename to wkv6 * rwkv6: support avx2 avx512 armv8 armv9 * rwkv6: update cuda file name * rwkv6: rename params * wkv on sycl * sycl: add some ops * sycl: Enhance OP support judgment * wkv6: drop armv9 and tranfer to GGML style ggml-ci * sync : ggml * update the function to use appropriate types * fix define error * Update ggml/src/ggml-cpu.c * add appropriate asserts * move element-wise functions outside * put the declaration outside the loop * rewrite to be more inline with the common pattern for distributing threads * use recommended way GGML_TENSOR_LOCALS --------- Co-authored-by: Georgi Gerganov <ggerganov@gmail.com> Co-authored-by: Diego Devesa <slarengh@gmail.com> Co-authored-by: Plamen Minev <pacominev@gmail.com> Co-authored-by: Yuri Khrustalev <ykhrustalev@users.noreply.github.com> Co-authored-by: Meng, Hengyu <airdldl@163.com>
34 lines
746 B
C++
34 lines
746 B
C++
//
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// MIT license
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// Copyright (C) 2024 Intel Corporation
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// SPDX-License-Identifier: MIT
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//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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#ifndef GGML_SYCL_BACKEND_HPP
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#define GGML_SYCL_BACKEND_HPP
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#include "concat.hpp"
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#include "common.hpp"
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#include "conv.hpp"
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#include "convert.hpp"
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#include "dequantize.hpp"
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#include "dmmv.hpp"
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#include "mmq.hpp"
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#include "mmvq.hpp"
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#include "rope.hpp"
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#include "norm.hpp"
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#include "softmax.hpp"
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#include "tsembd.hpp"
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#include "im2col.hpp"
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#include "wkv6.hpp"
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#include "outprod.hpp"
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#include "element_wise.hpp"
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#endif // GGML_SYCL_BACKEND_HPP
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